MPLAB SIM Release Notes

Release Notes for MPLAB® SIM Simulator

MPLAB® IDE v8.92

DLL and Firmware versions:

Sim12.dll | v2.10.00.00 |
Sim16.dll | v2.10.01.01 |
MPSim.dll | v8.62.01.0 | (SIM17)
Sim18.dll | v3.20.00.00 |
dsPicSim30.dll | v4.30.00.00 | (SIM30)
Sim32.dll | v0.00.10.06 |

July 8, 2013

Table of Contents

1 Device Support

2 Operating System Support

3 Reference Documents

4 What's New in v8.92

5 Repairs and Enhancements Made in v8.92

6 Known Problems

# 1 Device Support

Click the link below to see device support for the simulator (SIM).

· Device Support List

# 2 Operating System Support

This tool has been tested using the following operating systems:

32-Bit: Windows® 2000 SP4, Windows XP SP2, Windows Vista™ and Windows 7 OSs

64-Bit: Windows XP 64, Windows Vista 64 and Windows 7 64 OSs

NOTE: Windows NT® and Windows 98/ME OSs are NOT supported.

# 3 Reference Documents

The following documents may be found on our website or MPLAB IDE CD-ROM:

· MPLAB IDE User's Guide (DS51519)

· MPLAB IDE Quick Start Guide (DS51281)

· MPLAB IDE Quick Chart (DS51410)

On-line help (Help>Topics) is also available for this tool:

· Debuggers>MPLAB SIM - hlpMPLABSIM.chm

# 4 What's New in v8.92

None.

# 5 Repairs and Enhancements Made in v8.92

None.

# 6 Known Problems

The following is a list of known problems. For information on common problems, error messages and limitations please see Troubleshooting in the online help file for MPLAB SIM (hlpMPLABSIM.chm).

## 6.1 Debug/Release Build Configuration

Building a project for the simulator under Debug mode will cause non-required resources to be used. This may cause code without proper paging or banking operations not to function in this mode for 8 bit devices.

## 6.2 Cycle Accuracy Issues on SIM32

At this time the PIC32 simulator has some variations in cycle accuracy when compared to the real silicon. The PIC32 simulator does not simulate things like the cache, pre-fetch buffer, wait states and Bus matrix divisions. The Bus matrix is fixed at 1:1 with the processor clock. This can have an effect of making algorithm timing loops appear to be slower than they are in real silicon. Each instruction is accurate in execution and timing in itself.

## 6.3 PIC32 MCU Remappable Pins

Although the simulator may show support for PIC32 MCUs with remappable pins, no simulator module for pin remapping exists at this time. Therefore only pins that do not remap and the core would function for these devices.

## 6.4 System Service Requests (SSRs)

### 6.4.1 SIM SSRs

Key | Summary | Device Affected
SIM-856 | [SIM30] [WDT] Watchdog timer timed out as soon as clrwdt() is executed. | dsPIC33EP (64/128) GP XXX
SIM-853 | Timer 4/6 do not work on PIC18FxxK22. | PIC18F45K22
SIM-849 | TMR0 prescalar is not effective on PIC10F3xx devices. | PIC10F3xx
SIM-847 | For PIC16F1947, RC2IF does not get set after RC2REG buffer is changed. | PIC16F1947
SIM-846 | Register injection for PIC16F1947 involving RCREG results in "Identifier 'RCREG' is undefined. | PIC16F1947
SIM-843 | For PIC18F66K22, the library functions eeprom_read() and eeprom_write() don't work at all on MPLAB SIM. |
SIM-842 | PIC18F46K80: Timer4 interrupt flag never sets in simulator. | PIC18F46K80
SIM-840 | TSC bit errors occur when writing to T2CON and T3CON registers of the dsPIC30F6015 device. | dsPIC30F6015
SIM-838 | Flash Read/Write module not implemented for PIC10F320 and PIC10F322. | PIC10F322, PIC10F320
SIM-835 | TMR2 not incrementing in PIC24F08KL302. | PIC24F08KL302
SIM-834 | CCPx module doesn't work on TMR4 or TMR6 for the PIC18F87K90 family. | PIC18F87K90 family
SIM-832 | TRISA has incorrect R/W and RESET values for PIC16F720. | PIC16F720
SIM-830 | Peripheral interrupts are not implemented for PIC10F320 and PIC10F322. | PIC10F322, PIC10F320
SIM-829 | When executing a MOVSF instruction there are 3 clock cycles in the simulator; however, only 2 clock cycles per MOVSF should occur. |
SIM-822 | TRISA does not have bits 4 or 5 enabled on PIC12F1822. | PIC12F1822
SIM-821 | Disabling FCMEN *and* enabling extended instruction set causes division to occur incorrectly. | PIC18F97J60
SIM-819 | When hardware is used (via debugger), Reset condition correctly places the PC at the Auxiliary Reset Vector. When the simulator is used, Reset condition incorrectly places the PC at the Primary Reset Vector, which subsequently produces an address trap. | PIC24EP
SIM-818 | Carry' flag NOT getting updated upon execution of DAW.B instruction under decimal rollover condition. | dsPIC33FJ32GP302, PIC24FJ256GB206
SIM-817 | Setting TMR0IF before enabling GIEL/GIEH results in no interrupt occurring. The interrupt only occurs when RCONbits.IPEN = 1 for the PIC18F family. | Confirmed on PIC18F46K80; also maybe PIC18F4520, 4585
SIM-816 | On PIC24FV32KA302, the external input INT2 is set on RA6 instead of RB12. | PIC24FV32KA302
SIM-813 | Timer implementation is incorrect for PIC18LF45K80. | 18FLF45K80, maybe others in the family
SIM-810 | Cycle counts are incorrect for dsPIC33/PIC24EP devices: BSET/BCLR/BTG should take two, RETURN, RETFIE, and RETLW should take six. | dsPIC33EPXXXMU806/810/814, PIC24EPXXXGU810/814
SIM-801 | Cannot Map INT1 to Remappable Peripheral Pin 6 (RPI-6) for PIC24FJ64GB004. | PIC24FJ64GB004 Family
SIM-799 | CCP module does not have interrupts implemented correctly for PIC18FxxK22 devices. | PIC18FxxK22
SIM-798 | Comparator does not have C12IN0-C12IN4 implemented for PIC18FX6K22. | PIC18FXXK22
SIM-797 | T1G is not present in stimulus for PIC18F46K22 device. | PIC18F46K22
SIM-796 | Not all options for ADCON0,CHS are available. I.e., some ADC channels will give an error if attempted to be used. | PIC18F43K22
SIM-785 | PORTB can't be controlled on PIC18F23K22 and PIC18F24K22 even after care is taken to disable multiplexed functions. | PIC18F23K22, PIC18F24K22
SIM-784 | ECCP2 module missing from stimulus - might not be implemented. | PIC16F1824
SIM-782 | ANCON0 and ANCON1 lose affect if ADCON.GO is set for the PIC18F46J11. Note that all PORT's let you toggle I/O correctly initially. After ADON is set, however, the IO turn back to ANALOG until ANCON0 and ANCON1 is reset. | PIC18F46J11
SIM-781 | mov [wn+wb], xx' is not correct for dsPIC33/PIC24 EP devices. | dsPIC33/PIC24 EP devices
SIM-780 | PIC18F45K22 is missing T1G, T5CKI and CCP3 from stimulus. | PIC18F45K22
SIM-778 | RCREG2 is missing from stimulus for PIC18F67K90. | PIC18F67K90
SIM-777 | T1G is missing from stimulus for PIC18F67K90. | PIC18F67K90
SIM-776 | T1G is not defined in stimulus for PIC18F45K22. | PIC18F45K22
SIM-775 | T5CKI is not defined in stimulus for PIC18F45K22. | PIC18F45K22
SIM-774 | CCP3 is not defined in stimulus for PIC18F45K22. | PIC18F45K22
SIM-773 | WDT does not function for PIC16F721. | PIC16F721
SIM-771 | For PIC18F97J60, when using a temporary variable in the access bank, math under the simulator is incorect; for an example a=a*(a+1) +1. | PIC18F97J60
SIM-768 | For the PIC12F1822 at power-on, TRISA should be 00111111. The Simulator is 00001111. A customer using RA4 or RA5 must initialize their TRIS register or the simulator will give different results than their silicon. | PIC12F1822
SIM-767 | Clearing SAB bit of SR register doesn't clear SA and SB bits | dsPIC33F, dsPIC30F
SIM-764 | P1BSEL has no affect on the output pin for PIC12F1822. | PIC12F1822
SIM-763 | For PIC18F25K22 TIMER2 does not increment when device is in IDLE mode. It just stops. | PIC18F25K22
SIM-762 | CCP1 stimulus pins are missing for PIC12F617. | PIC12F617
SIM-761 | T2CKPS = 1x should be prescaler of 16 on PIC16F887. However, T2CKPS = 11 actually creates a prescaler of 64. | PIC16F887
SIM-760 | When the instruction at the last address in memory is a RETFIE, the simulator gives a warning: CORE-W0014: Halted due to PC incrementing over the Maximum PC address and wrapping back to Zero which is incorrect since it is returning and not wrapping back to 0x000. | PIC16F72x, other mid-range devices
SIM-757 | Flash Write does not work for PIC18LF45J10. | PIC18LF45J10
SIM-756 | DMCI tutorial using PIC18F87J10 does not work; please select another device. | PIC18F87J10
SIM-753 | The ADC of the dsPIC33F GS family is implemented as a dsPIC30F SMPS in simulator, which is not expected. The two families behave differently. | dsPIC33F GS family devices
SIM-752 | Positive or Negative edges do not trigger Interrupt on change for PIC12F1822 family devices. | PIC12F1822 Family
SIM-751 | Output Compare PWM doesn't let a user to change OC1R value while the PWM is enabled in PIC24FJ64GB004. | PIC24FJ64GB004
SIM-750 | RA3 pin cannot be used as digital input pin in simulator even though MCLR reset is disabled for PIC18F13k22 device | PIC18F13K22
SIM-747 | On PIC18F45K22, TMR4 and TMR6 do not operate. | PIC18F45K22
SIM-743 | On PIC18F14K50, RABIF is never set upon PORTA changing, even though IOCA is set. | PIC18F14K50
SIM-738 | When IOCBN and IOCBP are both clear, a positive or negative edge should not affect the IOC flags. In the simulator IOCIF still gets set. | PIC16F1827
SIM-737 | The simulator hangs when using __delay_ms(x) function from the HI-TECH PICC18 compiler. | PIC18F2620
SIM-734 | On PIC16F630 when TMR1 is ON, and you set TMR1 to 0xFFFF the rollover that happens will not trigger the TMR1IF bit. | PIC16F630
SIM-733 | Using WUE (Wake-Up Enable) with UART does not wake up if stimulus is applied to RX pin. |
SIM-732 | For the PIC18FxxJ50 family, if you put SFR RPINR16 = 0x1F, then any synchronous stimulus will cause a stimulus error upon hitting "apply". | PIC18F46J50, 65J50
SIM-729 | RESET instruction is not recognized by code coverage even when it is executed for PIC18F458. | PIC18F458
SIM-726 | The AD1PCFGL and AD1PCFGH special function registers are not defined in the .dev files for the PIC24FJxxxDAxxx devices. | PIC24FJ256DA210, PIC24FJ256DA206, PIC24FJ256DA110, PIC24FJ256DA106, PIC24FJ128DA210, PIC24FJ128DA206, PIC24FJ128DA110, PIC24FJ128DA106
SIM-725 | RA5 pin can not be turned to digital mode for PIC18F87K22 device | PIC18F87K22
SIM-723 | The ICxF trigger is not occurring where expected for the PIC24FJ256DA and PIC24FJ256GB family devices. | PIC24FJ256DA210 and PIC24FJ256GB210 Families
SIM-718 | RC12 and RC15 should function as port I/O only when Primary Oscillator / EC mode is (POSCMD = 11 or 00). Apparently they are acting like port IO for all oscillator settings for PIC24FJxxxDA devices. | PIC24FJ256DA, PIC24FJ256GB110 Family
SIM-712 | For the PIC18FxxK22 family, RABIF is always set upon stimulus of RA/RB, regardless of IOCA/IOCB. | PIC18F13K22
SIM-711 | Regardless of APFCON settings, PWM functionality on different pins does not change. | PIC16F18xx
SIM-709 | PIC16F19xx devices have implemented a four word flash write write. The datasheet indicates an eight word flash write. | PIC16F19xx
SIM-708 | For PIC18F13K50, Default value of ADCON1 should be 0x00. Instead, when you select the Simulator as a debugger and hit reset, the default value is 0x07. | PIC18F13K50
SIM-707 | Resetting a device while the T08BIT is cleared resets the SFR bit T08BIT to 1. The functionality continues as if it was cleared until it is toggled in code or the project is rebuilt. | PIC18F4680
SIM-706 | The simulator doesn’t output the entire contents of the UART register, only the first 7 bits. | PIC16F914 example, affects all
SIM-702 | On PIC10F2xx the conversion timming of the ADC is incorrect. It takes longer than it should. | PIC10F220

SIM-701

Incorrect RA6 and RA7 behavior for different CONFIG1 <FOSC> settings
For CONFIG1 <FOSC>:
FOSC: 0x100 (I/O function on RA7/OSC1/CLKI)
Two issues when FOSC = 0x100:
RA6 should not be affected by FOSC. However, in MPLAB SIM, FOSC = 0x100 turned RA6 into non I/O pin.
RA7 should be I/O function when FOSC is set to 0x100, but it is not.

PIC16F193x

SIM-699 | Only able to use default - TMR3 for Input Capture with Dedicated Timer for PIC24FJxxGA1 and GB. | PIC24FJ64GB004, PIC24FJ64GA104 families
SIM-686 | SFR TRISB does not work for Register Trace in stimulus. | PIC16F767, PIC24HJ256GP210, PIC18F25K20... probably all
SIM-664 | The warning "CORE-W0001: Illegal opcode or unitialized WREG has caused a reset" is issued when using W6 and W7 to write to an array for the PIC24FJ64GA004 device if they have not been written to before. | PIC24FJ64GA004 (perhaps other devices too)
SIM-663 | Resets in SIM (other than Processor Reset) did not reset SR to 0x0000, it remained unchanged. | dsPIC30F, dsPIC33F, PIC24F, PIC24H, etc. (A lot of green lit device)
SIM-660 | According to the datasheet (DS41350C), pins RA0/RA1 (D+,D- for USB) should only work as digital inputs (and not outputs). Pins RB4, RB5, RC0,RC1,RC2,RC3, although set as digital outputs, seem to need register ADCON1 to be set to '0x0F' (which is a reserved combination of bits, according to the datasheet). They won't work with ADCON1=0. | PIC18F13K50
SIM-656 | PIC18F4455 only supports CCP operations and not ECCP support. | PIC18F4455, PIC18F4610
SIM-632 | Cannot set RB15-RB12 for dsPIC33F32MC302/304, dsPIC33F64MCx02/x04, and dsPIC33F128MCx02/x04. | dsPIC33F32MC302/304, dsPIC33F64MCx02/x04, and dsPIC33F128MCx02/x04
SIM-628 | On PIC16F690, TMR2 does not increment on Fosc/4 when Prescalar of 1:16 is used. | PIC16F690, PIC16F887
SIM-543 | For PIC16F1936 and 1933 devices, ECCP1 pin assignment is incorrect . As a result, PWM output is not reflected in the PORTB pins | PIC16F1936 and 1933
SIM-474 | For PIC16F72x, Timer1 gated mode operation does not work when gate source is other than T1G input. | PIC16F72X
SIM-423 | For PIC24FKA devices, Flash and EEPROM write/Erase operation does not work for many options. | PIC24FxxKA

### 6.4.2 SIM32 SSRs

Key | Summary | Device Affected
SIM32-200 | CMPI instruction gives incorrect result in 16 bit mode for PIC32 devices | PIC32MX
SIM32-189 | Exception due to misaligned word access occurs on executing a program with functions defined in RAM using ramfunc attribute on Simulator. | PIC32 Family
SIM32-188 | Simulation goes into an endless loop when there is an interrupt and the C32 Math Function sqrt() is being used. | PIC32MX
SIM32-187 | Can't set the U1PWRC values for the Device PIC32MX575F256L. | PIC32MX575F256L
SIM32-182 | Clock stimulus and any SCL constructs attempting to compare the PC to either a shared label (function name) or hexadecimal value gives an error. The maximum hex value that can be set in the Clock Stimulus Dialog is 1D07FFFF, which appears to be the end physical address of program memory. Labels and PC (shown in the MPLAB IDE status bar) seem to be virtual addresses which are larger than the maximum allowed. | PIC32MX
SIM32-180 | External INT3 and INT4 cannot be simulated for PIC32MX675F256H, PIC32MX775F256H and PIC32MX775F512H due to missing identifier in stimulus | PIC32MX675F256H, PIC32MX775F256H, PIC32MX775F512H
SIM32-170 | CLRASM bit of ADC control register has no effect on terminating auto-sample after the first sequence is completed. | PIC32MX
SIM32-60 | PMPTTL bit of PMCON register and MODE8 of PMMODE register are not writable in simulator for PIC32 devices. | PIC32